搜索资源列表
fifo2
- 异步双时钟fifo，vhdl源代码。基本组成是定制的fifo加上空满判断逻辑，基本功能都有-Asynchronous dual clock fifo, vhdl source code. Fifo basic component is a custom air filled with the logic to judge the basic functions are
source_code
- verilog code fifo memory usb
FIFO
- 速度高达130MHz 可实现高速数据采集 程序源码为Verilog-Speeds up to 130MHz for high-speed data acquisition program source code for the Verilog
main
- Code Matlab of FIFO for 5 servers
Practica1
- A FIFO and LIFO source code
USB-slavefifo
- 在上位机上实现cy68013的slavefifo模式传输代码-In PC mode to achieve cy68013 of slavefifo transmission code
afifo
- verilog编写的异步FIFO代码，功能仿真时是正确的。-verilog code written in asynchronous FIFO, functional simulation is the right time.
aFifo
- 很好用的异步FIFO设计代码，和大家共享一下，这是我在一个美国的网站上找到的-Asynchronous FIFO design with good code, and share how this is an American site I found on
FIFO
- FIFO的VERILOG代码编写 可综合的Verilog FIFO存储器-The VERILOG code FIFO write comprehensive Verilog FIFO memory
fifo_chipscope
- 学习FIFO的初级资料，代码工程在ISE10.1上运行，还有在线示波器chipscope的步骤指导哦！-Study of the primary data FIFO, the code works ISE10.1 run, there is scope chipscope step online guide Oh!
fifo
- 操作系统FIFO页面置换算法实现VC6.0源码-FIFO page replacement algorithm for the operating system source code to achieve VC6.0
FIFO
- 页面置换算法的实现源码。主要为OS初学者提供参考。-Page replacement algorithm implementation source code. The main reference for the OS for beginners.
Page-replacement-algorithm
- 页面置换算法，在FIFO，LRU,OPT算法中比较 各算法的优劣-Page replacement algorithm, FIFO, LRU, OPT algorithm comparing the advantages and disadvantages of each method
fifo89
- 一个先进先出缓冲器的vhdl源代码，深度是8，宽度是9位。-A FIFO CODE IN VHDL.
FIFO
- 基于fpga的异步FIFO的设计和实现源代码-Fpga-based asynchronous FIFO design and implementation of source code
LZY
- 基于FPGA的软FIFO代码实现，双时钟，异步。VERILOG-FPGA-based soft FIFO code, two clocks, asynchronous. VERILOG
1MHZ-code
- * RECEIVER * * CC430 RF Code Example - TX and RX (fixed packet length =< FIFO size)
FIFO
- 时间片轮转的算法，其中有代码，还有ppt-Time slice rotation algorithm, which has a code, as well as ppt
FIFO24_CS8416[1]
- Fifo buffer vhdl code
fifo
- fifo in vhdl file code